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ESR 13 - Ahmed Saied

Publié le 1 février 2021

ESR13 Ahmed Saied

My PhD project focuses on the design of Sub-picosecond Time to Digital Converter (TDC). Low jitter TDC is a key component for a single-photon counting system. So, my goal is to design an efficient TDC by optimizing the main design metrics.

I received the B.Sc. and M.Sc. degrees in Electronics Engineering from Helwan University, Egypt, in 2012 and 2018, respectively. I participated in the ALICE experiment upgrade at CERN in 2015.


This project has received funding from the European Union’s Horizon 2020 Research and innovation Programme under the Marie Sklodowska-Curie Grant Agreement No. 861097.